Design Verification Lead, Google Cloud
Skills
- System Verilog
- Specman
- ASIC
- SOC
- Hardware Verification
- Computer Architecture
- Digital Design
About the role
About the job:
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Lead a team of chip engineers, plan tasks, allocate people, and hold verification design/code reviews.
Perform code development for critical verification features and capabilities.
Work closely with system, software, design, and physical implementation stakeholders to make technical decisions and represent project status throughout the development process.
Lead design verification efforts and work with external and internal partners.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience with hardware verification languages (System Verilog/Specman), design verification methodologies, and chip design flow.
Experience creating detailed chip or subsystem design verification strategies and plans.
Experience leading design verification teams through the full cycle, from concept to delivery.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience with verification techniques and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
Experience with multiple SOC projects/cycles in three or more products.
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