About the job:
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
Responsibilities:
Define and drive to the implementation of physical design STA methodologies.
Take ownership of STA of one or more physical design partitions or top level.
Drive to the closure of timing and power consumption of the design.
Contribute to design methodology, libraries, and code review.
Define the physical design STA constraints rule sets for the Physical design engineers.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience in coding or scripting languages (e.g., Python, Tcl).
4 years of experience in physical design flows and methodologies, with a focus on static timing analysis (STA).
Experience in ECO flows.
Experience in high-speed design timing convergence and with static timing analysis tools (e.g., PrimeTime or Tempus).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with scripting languages such as Perl, Python, or Tcl.
Experience with constraints, synthesis or clock tree synthesis (CTS)
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